Schematic (click to zoom):
two 12 bits, 8 channel ADCs are used to measure the level of various sensors. This circuit is the "eye" of the controller. These ADCs have an internal FIFO which reduces CPU load dramatically and allows a very fast Peak-Power measurement (the power is measured 10.000 times per second). Additionally the ADCs have an internal averaging logic which removes jitter and glitches from the measured values.
In the top right you see the ALC circuit. The speciality of this circuit is that the ALC is derived from the current consumption (instead of the output power). This ensures an ALC limiting funtion even at very bad SWR values at the antenna output.